This invention relates to learnable binary systems.
Up to the present, learning in traditional neural networks is performed by modifying each weight of the process and threshold of each neuron. However, as the operations of the above-mentioned weights and thresholds require complicated and large-scale hardware such as adders and multipliers, and take a long time to operate, it was difficult to realize large-scale hardware.
The present invention is developed in consideration of the above drawback, and the object of this invention is to provide learning methods in binary systems, by modifying the connected states of the circuit in each of the basic binary circuits in binary combined logical and sequential circuits composed with basic binary gates such as AND, OR, NOT, NAND, NOR and EXOR gates.